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Computer Org. & Architecture (CS-404)

Second Year CS-4th Semester.

Syllabus

RAJIV GANDHI PROUDYOGIKI VISHWAVIDYALAYA, BHOPAL

New Scheme Based On AICTE Flexible Curricula

Computer Science and Engineering, IV-Semester

CS404 Computer Org. & Architecture

Objectives: Students to familiarize the basic principles of computer architecture, Design, and Multi-Processing, Types of data transfer, Concept of semiconductor memories which is useful for research work in field Computer System.

Basic Structure of Computer: Structure of Desktop Computer, CPU: General Register Organizations-Memory Register, Instruction Register, Control Word, Stack Organization, Instruction Format, ALU, I/O System, buses, CPU and Memory Program Counter, Bus Structure, Register Transfer Language-Buses, and Memory Transfer, addressing modes. Control Unit Organizations: Basic Concept of Instruction, Instruction Types, Micro Instruction Formats, Fetch and Execution cycle, Hardwired control unit, Microprogrammed Control unit microprogram sequencer Control Memory, Sequencing and Execution of Micro Instruction.

Computer Arithmetic: Addition and Subtraction, Tools Compliment Representation,Signed Additions and Subtraction, Multiplication and division, Booths Algorithm,Division Operation, Floating Point Arithmetic Operation. design of Arithmetic unit.

I/O Organizations: I/O Interface –PCI Bus, SCSI Bus, USB, Data Transfer: Serial, Parallel, Synchronous, Asynchronous Modes of  Data Transfer, Direct Memory Access(DMA), I/O Processor. Memory Organization: Main memory-RAM, ROM, Secondary Memory –Magnetic Tape, Disk, Optical Storages, Cache Memory: Cache Structure and Design, Mapping Scheme, Replacement Algorithm, Improving Cache Performance, Virtual Memory, memory management hardware

Multiprocessor: Characteristics of  Multiprocessors, Structure of Multiprocessor-Interprocessor Arbitration, Inter-Processor Communication, and Synchronization. Memory in Multiprocessors System, Concept of Pipelining, Vector Processing, Array Processing, RISC And CISC, Study of Multicore Processors –Intel, AMD.

Reference Books:

1.Morris Mano, “Computer System Organization ”PHI

2.Alan Clements: “Computer Organization and Architecture”, Cengage Learning

3.Subrata Ghosal: “Computer Architecture and Organization”, Pearson

4.William stalling, “Computer Architecture and Organization” PHI

5.M. Usha, T.S. Shrikant: “Computer System Architecture and Organization”, Willey India

6.Chaudhuri, P.Pal: “Computer Organization and Design”, PHI

7.Sarangi: “Computer Organization and Architecture”, Mc-Graw Hills.

Computer Org.& Architecture (List of Practicals)

1. Study of Multiplexer and Demultiplexer

2. Study of Half Adder and Subtractor

3. Study of Full Adder and Subtractor

4. WAP to add two 8 bits numbers and store the result at memory location 2000

5. WAP to multiply two 8 bit numbers stored at memory location 2000 and 2001 and store the result at memory locations 2000 and 2001.

6. WAP to add two 16-bit numbers. Store the result at memory address starting from 2000.

7. WAP which test if any bit is ‘0’ in a data byte specified at an address 2000. If it is so, 00 would be stored at addresses 2001 and if not so then FF should be storedat the same address.

8. Assume that 3 bytes of data are stored at consecutive memory addresses of the data memory starting at 2000. Write programs which load register C with (2000), i.e. with data containe at memory address 2000, D with (2001), E with (2002) and A with (2001).

9. Sixteen-byte of data is specified at consecutive data-memory locations starting at 2000. Write a program which increments the value of all sixteen byte by 01.

10. WAP to add t 10 bytes stored at memory location starting from 3000. Store the result at memory location 300A


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